Run-Time Reconfigurable Instruction Set Processor (RT-RISP): Design and Simulation Using Verilog-HLD - Muhammad Aqeel Iqbal,Shoab Ahmed Khan
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Run-Time Reconfigurable Instruction Set Processors are next generation processors, which can optimize their instruction sets according to the demands of the applications being under execution on them. This optimization is achieved through reconfiguration in their hardware on fly. In this way the reconfigurable processors adapt their hardware, which is most suitable one for the running application and conseq ... Täydellinen kuvaus
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Run-Time Reconfigurable Instruction Set Processors are next generation processors, which can optimize their instruction sets according to the demands of the applications being under execution on them. This optimization is achieved through reconfiguration in their hardware on fly. In this way the reconfigurable processors adapt their hardware, which is most suitable one for the running application and consequently they enhance the performance. Reconfigurable instruction set processors are the programmable processors that contain the reconfigurable logic in one or more of their functional units. The hardware design of such type of processors can be categorized into two main tasks: The design of reconfigurable logic itself and the design of the communication interface of reconfigurable logic with the remaining modules of the processor.
Lisätietoja
| Kirjoittaja | Muhammad Aqeel Iqbal, Shoab Ahmed Khan |
|---|---|
| Julkaisija | LAP LAMBERT Academic Publishing |
| Julkaisuvuosi | 2012 |
| Kannen tyyppi | Pehmeäkantinen |
| EAN | 9783847336778 |